The present invention relates generally to the field of integrated circuits (ICs) and in particular, to process, voltage, and temperature (PVT) variations in ICs.
PVT variations are one of the critical factors that hamper the performance of the ICs. For example, PVT variations can result in a change in setup and hold times of synchronous circuits. Different components of a synchronous circuit are driven by a common system clock. Therefore, a change in the setup or hold times corresponding to any one component can result in erroneous circuit output. PVT variations can also result in fast switching in signals, which can cause electromagnetic interference (EMI). Further, PVT variations may cause current leakage.
One technique for reducing PVT variations of a circuit is based on sensing variations in the operation of the circuit, and taking appropriate action to reduce these variations. For example, if a variation in the signal delay is identified in the circuit, then the input signal delay is changed to compensate for the variation.
Another technique to compensate for PVT variations uses a control value. The circuit output is compensated for by regulating the control value so that the output corresponds to typical input-output characteristics of the circuit. However, variations in the control value cannot be controlled. Yet another technique measures changes in RC time constants due to PVT variations and compensates for the PVT variations in the capacitors.
Some of the techniques mentioned above do not distinguish between different process corners at which the IC is fabricated. Therefore, the techniques do not provide sufficient compensation for the PVT variations. Further, memory space is required to compensate for the voltage variations in the IC.